1. Field of the Invention
The present invention relates to signal selection circuits, and in particular, to signal selection circuits used for programmably selecting between multiple input voltages and suitable for use as electrostatic discharge (ESD) protection circuits for electrically erasable programmable read only memories (EEPROMs).
2. Description of the Related Art
Electrically erasable programmable read only memory circuits require a high programming voltage (e.g. 15 volts or more) which is often supplied by an external voltage source separate from the normal circuit power supply voltage source. Most products using EEPROM technology are designed and manufactured to operate with power supply voltages of five volts or less. High voltage transistors can be used to isolate the higher voltage EEPROM circuit from the native lower voltage devices. However, the integrated circuit chip pad used to bring in the higher programming voltage must be protected with a high voltage zener diode which is designed to break down at a voltage greater than the programming voltage. Accordingly, an ESD event can result in a high voltage momentarily powering up the EEPROM circuit and thereby altering the characteristics of the "core" memory transistors. Indeed, the original information stored in the EEPROM could possibly be erased or reprogrammed, thereby jeopardizing the reliability of the EEPROM as a result of such an ESD event.
Accordingly, it would be desirable to have a means by which an EEPROM circuit can be protected from ESD events as well as accidental erasure or reprogramming of its programmed information.